address (Total 33607 Patents Found)

A computer system which utilizes two different sets of address control and state information signals for transferring information of the same or different widths is disclosed. The use of two sets of signals allows master units to utilize only one set and a system board determines when the second set of signals must be ...
The performance of a multi-microprocessor implemented data processing system that emulates a mainframe system is enhanced and optimized in view of space and power constraints for purposes of address translation by providing RAM-based storage means of predetermined depth and width to function as a page address table. Th...
A memory macro is a combination of functional modules such as a main amplifier module, memory bank modules of which each memory bank operates independently, a power source circuit, etc. The storage capacity of the memory macro can be easily changed from a large capacity to a small one by changing the number of the memo...
A connection apparatus connecting LANs includes LAN control sections, an address searching/registering section and a wiring network. The LAN control sections are respectively provided for LANs which transmit frames, and at least issue a request for address registering and a request for address searching. The address se...
A disk drive is provided which uses a disk having a maximal limit cylinder group formed based on an initially recorded servo data before being assembled in a drive body. A CPU sets an actually usable data recording area on the disk by seeking the head in a radial direction over the disk. Further, the CPU allows the gen...
This invention is related to a thin film transistor (TFT) array and method of making same, for use in an active matrix liquid crystal display (AMLCD) having a high pixel aperture ratio. The TFT array and corresponding display are made by forming the TFTs and corresponding address lines on a substrate, coating the addre...
In an arrangement where the device that is known to an ISP is communicating with the ISP through an interposed device that is not known to the ISP, the interposed device captures the known device's MAC address upon startup and clones the captured MAC address in all standard packets that it sends to the ISP....
Provided is an apparatus for changing Media Access Control (MAC) address, which is a conventional subscriber hardware identification address for identifying each subscriber, and a method thereof. The MAC address changing apparatus includes a frame receiving block for determining whether to change a source MAC address; ...
An improved scalability runtime system for a global address space language running on a distributed or shared memory machine uses a directory of shared variables having a data structure for tracking shared variable information that is shared by a plurality of program threads. Allocation and de-allocation routines are u...
Methods for read after write forwarding using a virtual address are disclosed. A method includes determining when a virtual address has been remapped from corresponding to a first physical address to a second physical address and determining if all stores occupying a store queue before the remapping have been retired f...
A processor uses the same virtual address space for heterogeneous processing units of the processor. The processor employs different sets of page tables for different types of processing units, such as a CPU and a GPU, wherein a memory management unit uses each set of page tables to translate virtual addresses of the v...
An address resolution method, comprising obtaining an Internet Protocol (IP) address for a destination network node, computing a Media Access Control (MAC) address for the destination network node using a mapping function and the IP address for the destination network node, and sending data traffic using the MAC addres...
Selective purging of guest entries of structures associated with address translation. A request to purge entries of a structure associated with address translation is obtained. Based on obtaining the request, a determination is made as to whether selective purging of the structure associated with address translation is...
An embodiment of a method for detecting permanent faults of an address decoder of an electronic memory device including a memory block formed by a plurality of memory cells, including the steps of: selecting an address, which identifies a selected set of memory cells; writing at the selected address a code word generat...
Included are systems and methods for providing dual network address translation. Accordingly, some embodiments include translating, via a processor at a network operations center (NOC), a public source address and a public destination address to and from assigned unique private addresses for data to be communicated acr...
Methods, computer systems, and computer readable media provide for automated control of the status of network address space. Blocks of networking address space assigned to a network may be allocated from a free status to a new status based upon a request to allocate a particular size block. Blocks of networking address...
A translation table entry contains a change recording override field for controlling whether a change bit is to be set on a store or not. Each 4K byte block of main storage has an associated storage key comprising a change bit. The change recording override field controls whether the change bit of the storage key assoc...
Facilitating communications within a processing environment. Inbound traffic and outbound traffic on one or more virtual interfaces of the processing environment are monitored for a predefined amount of time. Based on the monitoring, a determination is made as to whether for a selected component of a virtual interface ...
A fail address detector includes cam latch groups configured to store fail addresses and a comparing section connected to the cam latch groups in common and configured to detect whether or not a fail address corresponding to a comparison address exists among the fail addresses received from the cam latch groups. The ca...
The present disclosure discloses a network device and/or method for centralized configuration with dynamic distributed address management. The disclosed network device receives, at a first network node, a range of sub network addresses and a specified size for a sub network. The disclosed network device then divides th...
A memory address remapping architecture is applied to execute an address remapping method for repairing a main memory. A valid flag and an essential flag in a TCAM corresponding to at least one subcube address in a spare memory are initialized, and the main memory is checked to find out some faulty cell addresses. The ...
A method includes selectively coupling a first address line of a plurality of address lines and a second address line of the plurality of address lines to a first element bank of a plurality of element banks of a vector register file according to a selection pattern. The method also includes accessing data stored withi...
一种利用IPv6过渡协议支持对等网络地址转换的系统及方法,移动终端设备确认对等NAT后,通过移动通信网和Teredo中继向Teredo服务器发送携带来源的路由器请求报文;Teredo服务器记录移动终端设备在移动通信网中的源地址,并发送携带来源的路...
An apparatus for determining cacheable address and write-protect memory address regions in a computer system which includes a programmable single-ended limit register and a single comparator to determine each such region. A programmable limit register associated with each respective memory address region defines a boun...
An address-translation method is provided for efficiently translating effective addresses into physical addresses in X-86 based computers. In this method and system, when an effective address is generated, a segment base is then generated from a segment-descriptor cache memory in response to a selector address from the...
An instruction cache having a pattern detector for use in predicting the length of variable length instructions in a microprocessor. The instruction cache comprises an instruction length calculation unit and the pattern detector. The pattern detector is configured with a content addressable memory and update logic. The...
A long time optical recording and repeated reproduction of multimedia information is possible. Using a printer system or printing process system, on a recording medium such as a sheet, the so-caled multimedia information in the form of dot codes (36) together with images (32) and characters (34) is recorded. The multim...
A multiple-register-access-capable device includes a serial port coupled to a plurality of registers. The multiple-register-access-capable device is controlled by a state machine. Information in one of the registers identifies whether the device is in a single-register or multiple-register mode. The state machine which...
In the system, a buffer and a multiplexer are electrically connected to an I 2 C interface and a control interface of a PCH. A plurality of memory are electrically connected to the buffer and corresponding to a first I 2 C address respectively. A plurality of card slots are electrically connected to the multiplexer for...
Various disclosed embodiments include methods and systems for provisioning traversal using relays around network address translation (TURN) credentials and servers for network address translation/firewall (NAT/FW) traversal via a Voice-over-Internet-protocol/Web Real-Time Communication (VoIP/WebRTC) signaling channel. ...
The invention provides a system and method for sharing (or “multiplexing”) of the same internet (IP) address/port by multiple instances of multiple level security and/or single level security (SLS) server applications (each of which is used for processing one or more client request(s) falling within a range of secu...
Various embodiments of a method, apparatus and article of manufacture provide e-mail from a user with a primary e-mail address. A temporary e-mail address is generated. The temporary e-mail address is associated with a time decay attribute and the primary e-mail address. The e-mail is sent using the temporary e-mail ad...
The present invention provides a method, system, service, and computer program product for identifying incorrect domain name to IP address mappings. The method comprises: providing a domain name and a valid IP address for the domain name to a plurality of nodes; and at each node: performing a local domain name system (...
This invention relates generally to a method of associating an IP address with a link layer address in a wireless communication network. The method comprises the steps of assigning an IP address to a plurality of link layer addresses; establishing a link layer connection with a first wireless network interface on the I...
The present invention provides an improved way to calculate a replacement way within a processor cache that is effective with different combinations of hardware address translation cache miss handling, software address translation cache miss handling, and hint lock bits. For some embodiments, LRU bits used to select an...
An information carrier medium containing software that, when executed by a processor, causes the processor to receive information from caches on different cache levels, at least some of the information from caches on different cache levels associated with a common address. The software also causes the processor to dete...
A system, method, apparatus, and article of manufacture provide the ability to configuring out-of-home streaming between a mobile device and a set top box (STB). Internet connectivity establishment (ICE) agents, installed on the mobile device and the STB, determine telemetry information via communication with network a...