semiconductor (Total 702093 Patents Found)

Resilient contact structures are mounted directly to bond pads on semiconductor dies, prior to the dies being singulated (separated) from a semiconductor wafer. This enables the semiconductor dies to be exercised (e.g., tested and/or burned-in) by connecting to the semiconductor dies with a circuit board or the like ha...
A method of manufacturing a semiconductor device, including the steps of: cooling a semiconductor wafer to a predetermined temperature, the semiconductor wafer being mounted on a stage provided with cooling means and having a thin oxide film on a surface thereof; supplying energy to gas containing hydrogen and water va...
A semiconductor device is made from a body of semiconductor material having a layer of dielectric material and a first layer of conductive material over a main face of the body, the layers each having an opening therein through which an area of the main face of the body of semiconductor material is exposed. A second la...
A semiconductor device including bond pads disposed proximate an edge thereof, and an overcoat layer. The overcoat layer defines notches around each of the bond pads. The overcoat layer may be formed from a photoimageable material such as a photoimageable epoxy. The invention also includes an alignment device that secu...
After a catalyst element is introduced into an amorphous silicon film, the amorphous silicon film is converted into a crystalline silicon film by a heat treatment and laser irradiation. After a resist mask is formed on the crystalline silicon film, boron and phosphorus are selectively introduced into the crystalline si...
Semiconductor device including semiconductor capacitance diode, comprising a low resistivity substrate and a higher resistivity first layer, both of first conductivity type; a diffused surface region at the surface of the first layer or of a second layer located at the first layer, the diffused region having a conducti...
A system and method for eliminating interconnect extrusions in vias that are formed during ionized metal plasma processing. By eliminating interconnect extrusions in vias, reliability failures and yield loss are decreased. The extrusions of interconnect metallization occur while wafers are subject to elevated temperatu...
A memory macro is a combination of functional modules such as a main amplifier module, memory bank modules of which each memory bank operates independently, a power source circuit, etc. The storage capacity of the memory macro can be easily changed from a large capacity to a small one by changing the number of the memo...
A surface-protecting film is formed on the surface of the semiconductor element of a resin-sealed semiconductor device to prevent the peeling and cracking of the sealing member used in said device, by coating on said surface a polyimide precursor composition containing a polyimide precursor having a recurring unit cons...
An integrated electronic control circuit comprises a microcontroller connected to at least one volatile memory, at least one input/output port, a plurality of control devices, and an electronic non-volatile memory device comprising a non-volatile memory cell matrix linked to a control register, and a switch element con...
A laser illumination apparatus for illuminating a semiconductor film with a linear laser beam while scanning the semiconductor film with the linear laser beam. An optical system generates a linear laser beam having a beam width W by dividing a pulse laser beam that is emitted from a pulsed laser light source into a plu...
The present invention relates to a bit counter, and a program circuit of a semiconductor device and a program method using the same. Upon a program operation of a word unit, only program data to be programmed among the program data are counted within a pumping period using the bit counter for counting bits of program d...
An electrically conductive paste comprises 80% by weight or more of silver powder and 20% by weight or less of a thermosetting resin. The silver powder has a particle size distribution having two peaks at specific positions. Viscosities of the paste measured under a low shearing stress and under a high shearing stress ...
Disclosed is a method of forming an isolation film in semiconductor devices using a shallow trench. Trenches are formed in silicon substrates of a memory cell region and a peripheral circuit region. The inert ion is then injected into the surface of the trench in the peripheral circuit region, thus forming an amorphous...
Embodiments of the invention comprise a new device and technique to realize an improved temperature control for a chemical photoresist developer utilizing a preexisting integrated single reservoir. This improvement is achieved by providing for a modified temperature control unit and procedure. The temperature control u...
The present invention introduces methods for implementing gridless non Manhattan architecture for integrated circuits. In one particular embodiment, an integrated circuit layout containing horizontal, vertical, and diagonal interconnect lines is first created. Next, the integrated circuit layout is then compacted. The ...
An internal voltage conversion circuit for a DRAM wherein a voltage level of an internal power supply is regulated by an external signal applied to the DRAM pins after packaging to perform reliability tests. The internal voltage conversion circuit includes a test mode signal generator, for generating a test mode signal...
Cubic or metastable cubic refractory metal carbides act as barrier layers to isolate, adhere, and passivate copper in semiconductor fabrication. One or more barrier layers of the metal carbide are deposited in conjunction with copper metallizations to form a multilayer characterized by a cubic crystal structure with a ...
In a microstrip line, a package for mounting a required semiconductor device between a pair of blocks of dielectric material disposed on a first conductive plate to be spaced apart a predetermined distance from each other in the longitudinally extending direction of the first conductive plate. The package is provided w...
A novel electrostatic discharge (ESD) protection device used for mixed voltage application is disclosed. Semiconductor-controlled rectifier (SCR) is utilized as the basic protection device for ESD current bypass. MOS transistors are stacked in a cascode configuration with at least two transistors to reduce the trigger ...
In a semiconductor memory device of a redundancy configuration having lines (rows or columns) of main memory cells and a line of spare memory cells made to substitute a defective line responsive to the address of the defective line, a comparator compares an address input to the memory device, with the address of the de...
Disclosed is the serial access memory having the improved precharging system of reading bit lines (4). In this serial access memory, an address pointer (9, 114) outputs a signal for selecting one of the reading bit lines (4). Meanwhile, each reading bit line (4) is provided with an MOS transistor (7) for precharging th...
Disclosed are measurement (observation) pads for judging whether or not a dynamic random access memory (DRAM) adopting a shared sense system is functioning as designed. Concretely, measurement pads are formed by the step of forming a second layer of wiring respectively connected to pairs of complementary data lines whi...
The semiconductor memory device formed on a semiconductor substrate includes: a memory cell array having a plurality of memory cells formed at intersections between a plurality of word lines and a plurality of bit line pairs; a plurality of sense amplifiers each formed to correspond to each of the plurality of bit line...
A semi-conductor device including a housing for a semi-conductor body of the field-effect type having an insulating gate electrodes and electric conductors which emerge from the housing and are located in a circle. The conductors are surrounded by a closed, flexible ring of an electrically conductive rubber material su...
A resistive element which is formed in a semiconductor substrate comprises a first semiconductor region which is formed in the semiconductor substrate and in which an impurity is diffused at a first concentration; a second semiconductor region which is connected to the first semiconductor region at one end and in which...
A reference voltage generating circuit and a standby down-converting circuit or a tuning circuit are located in the periphery of the region where a semiconductor device is formed on a semiconductor chip, and a region including an active down-converting circuit which operates during an active cycle or a drive circuit is...
A semiconductor integrated circuit so configured to stop the supplying of an electric power to a logic circuit in a standby mode, thereby to realize a low power consumption, includes a latch circuit characterized in that as the control signal a clock signal is supplied in the active mode, and a signal for creating an i...
A data management system for reviewing at least one layer of at least one semiconductor wafer is connected to a first inspection device and a second inspection device. The system includes a server which is connected to the first and second inspection devices. A review station is connected to the server. In use, the fir...
In a signal delay time calculation method of calculating an approximate signal delay time in an LSI based on AWE in which a signal voltage waveform is calculated by using terms of an admittance up to n-th order obtained by Laplace transform for the LSI. Even if there are one or more poles of the signal having a real-nu...
A method of manufacturing a semiconductor device having a submicron pattern. A p-type semiconductor layer is formed on an n-type semiconductor substrate. Insulating films are formed on the p-type semiconductor layer. A first mask layer, such as an aluminum layer having an etching rate different from that of the insulat...